Accelerating phase unwrapping and affine transformations for optical quadrature microscopy using CUDA

Optical Quadrature Microscopy (OQM) is a process which uses phase data to capture information about the sample being studied. OQM is part of an imaging framework developed by the Optical Science Laboratory at Northeastern University. In one particular application of interest, the framework is used to extract phase information from the image of an embryo to determine embryo viability. Phase Unwrapping is the process of reconstructing the real phase shift (propagation delay) of a sample from the measured “wrapped“ representation which is between −π and +π. Unwrapping can be done using the Minimum L P Norm Phase Unwrap algorithm. Images are first preprocessed using an Affine Transform before they are unwrapped. Both of these steps are time consuming and would benefit greatly from parallelization and acceleration. Faster processing would lower many research barriers (in terms of throughpu

xStream Processor Group #057

Stream Processing is a data processing paradigm in which long sequences of homogeneous data records are passed through one or more computational kernels to produce sequences of processed output data. Applications that fit this model include polygon rendering (computer graphics), matrix multiplication (scientific computation), 2D convolution (media processing), and encryption. Computers that exploit stream computations are able to process data much faster than conventional microprocessors because they have a memory system and execution model that permits high on-chip bandwidth and high arithmetic intensity (operations performed per memory access). We have designed a general-purpose, parameterizable, SIMD stream processor that operates on 32-bit IEEE floating point data. The system is implemented in VHDL, and consists of a configurable FPU, execution unit array, and memory interface. The FPU supports fully pipelined operations for multiplication, addition, division, and square root, with a configurable data width. The execution array operates in lock-step with an instruction controller, which issues 32-bit instructions to the execution array. To exploit strea